#include <rb9005_amplifier.h>
Inherits RulbusDevice.
Provide programmable amplifiers and filters to form a data-acquisition system with the high speed 12-bit ADC RB8905.
Module RB9005 is a 4-channel programmable amplifier-filter module.
It contains
When an amplifier is created, it is configured as follows:
Here is a small example how you may use an amplifier module.
Rulbus::RB9005_amplfier amplfier( "amplfier" );
amplfier.setChannel( 1 );
amplfier.setGain ( 1, 1000 );
amplfier.setLowPassFrequency( 1, 10e3 );
The programmable amplfiers, filters and multiplexer are controlled via four registers. The following table gives an overview of the module's registers.
Registers Offset Rd/Wr Description ----------------------------------------------------------------------------- gain12 0 write register to control gain of differential amplifiers 7654 : gain code of channel 1 3210 : gain code of channel 2 multiplexer 1 write register to control clock and multiplexer 7 : clock sequence (alternate) 6 : channel sequence (autoscan) 543 : channel(s) for sequence 210 : channel on the output gain34 2 write register for gain factor of the single end amplifier. 7654 : not used 32 : gain of channel 4 10 : gain of channel 3 lowpass1 3 write register for low pass filter channel 1 7654 : not used 3210 : low pass frequency lowpass2 4 write register for low pass filter channel 2 7654 : not used 3210 : low pass frequency
The following tables describe the meaning of the bits of the fours registers.
Register g a i n 1 2 Code Gain Code Gain ch 1 ch 2 ch 1 ch 2 ----------------------------------------------------------------------------- 0000 0000 10 1000 1000 1000 0001 0001 20 1001 1001 2000 0010 0010 40 1010 1010 4000 0011 0011 80 1011 1011 8000 0100 0100 100 1100 1100 10000 0101 0101 200 1101 1101 20000 0110 0110 400 1110 1110 40000 0111 0111 800 1111 1111 80000
Register l o w p a s s 1,2 Register g a i n 3 4 Code Flp [kHz] Code Gain chan 3 4 -------------------------------- ---------------------------------------- xxxx 0000 >= 1000 xxxx 00 00 1 xxxx 0001 100 xxxx 01 01 10 xxxx 0010 10 xxxx 10 10 100 xxxx 0100 1 xxxx 11 11 1000 xxxx 1000 0.1
Register m u l t i p l e x e r Code channel and clock Code channel and clock sequence ----------------------------------------------------------------------------- x0xx x000 1 x100 0xxx 1-> 1-> 1-> 1 x0xx x001 2 x100 1xxx 2-> 1-> 2-> 1 x0xx x010 3 x101 0xxx 3-> 2-> 1-> 3 x0xx x011 4 x101 1xxx 4-> 3-> 2-> 1 0xxx xxxx clock out1 = out2 1xxx xxxx clock out1/out2 alternating
Note: non-sequence selection of channel 4 differs from the original documentation (that specifies pattern x0xx x100).
Method setChannel() sets both the sequence and non-sequence channel bits at the same time and sequencing is enabled or disabled with enableChannelSequence() and enableClockSequence() by setting and clearing the appropriate sequencing bit. Note that the bit-patterns for both channel selections differ!
Public Types | |
typedef Int | Value |
register value type | |
Public Member Functions | |
Construction | |
RB9005_amplifier (NameCref name, Addr addr=DEF_ADDR, Rack rack=DEF_RACK) | |
constructor. | |
~RB9005_amplifier () | |
destructor. | |
Accessors | |
int | channel () const |
the current channel (1..4). | |
int | gain (int aChannel) const |
the channel's current gain. | |
Freq | lowPassFrequency (int aChannel) const |
the channel's current low pass frequency (channel 1 & 2 only). | |
bool | isChannelSequenceMode () const |
true if a channel sequence is active. | |
bool | isClockSequenceMode () const |
true if a clock sequence is active. | |
Mutators | |
void | setChannel (int aChannel) |
select specified channel, or channel sequence (1..4). | |
void | setGain (int aChannel, int aGain) |
set gain for specified channel. | |
void | setLowPassFrequency (int aChannel, Freq aFrequency) |
set low pass frequency (channel 1 & 2 only). | |
void | enableChannelSequenceMode (bool enable=true) |
enable or disable channel sequencing. | |
void | enableClockSequenceMode (bool enable=true) |
enable or disable clock sequencing. | |
Static Public Attributes | |
Defaults | |
const Addr | DEF_ADDR = 0xB3 |
default address | |
Limits | |
const Value | LIM_MINCHN = 1 |
lowest channel number | |
const Value | LIM_MAXCHN = 4 |
highest channel number | |
Protected Member Functions | |
Construction and Assignment | |
RB9005_amplifier () | |
prevent default construction | |
RB9005_amplifier (RB9005_amplifierCref rhs) | |
prevent copying | |
RB9005_amplifierRef | operator= (RB9005_amplifierCref rhs) |
prevent copying | |
Tools | |
void | checkChannel (int aChannel) const |
check for valid channel number; may throw RulbusRangeError. | |
int | gain12 (int aChannel) const |
the current gain for channel 1 or 2. | |
int | gain34 (int aChannel) const |
the current gain for channel 3 or 4. | |
Freq | lpf12 (int aChannel) const |
the current low pass frequency for channel 1 or 2. | |
Freq | lpf34 (int aChannel) const |
cannot set/obtain low pass frequency for channels 3 & 4: throws RulbusRangeError. | |
void | setGain12 (int aChannel, int aGain) |
set gain for channel 1 or 2. | |
void | setGain34 (int aChannel, int aGain) |
set gain for channel 3 or 4. | |
void | setLpf12 (int aChannel, Freq aFrequency) |
set low pass frequency for channel 1 or 2; may throw RulbusRangeError. | |
void | setLpf34 (int aChannel, Freq aFrequency) |
cannot set low pass frequency for channels 3 & 4: throws RulbusRangeError. | |
Private Attributes | |
Data | |
Byte | theGain12Register |
Channel 1,2 amplifier gain setting. | |
Byte | theGain34Register |
Channel 1,2 amplifier gain setting. | |
Byte | theFreq1Register |
Channel 1 filter setting. | |
Byte | theFreq2Register |
Channel 2 filter setting. | |
Byte | theMuxRegister |
Channel and clock multiplexer setting. | |
Static Private Attributes | |
Register offsets | |
const int | OFF_GAIN12 = 0 |
Channel 1,2 amplifier gain register offset. | |
const int | OFF_MUX = 1 |
Channel and clock multiplexer register offset. | |
const int | OFF_GAIN34 = 2 |
Channel 3,4 amplifier gain register offset. | |
const int | OFF_FREQ1 = 3 |
Channel 1 filter register offset. | |
const int | OFF_FREQ2 = 4 |
Channel 2 filter register offset. | |
const int | ADR_WIDTH = OFF_FREQ2 + 1 |
address width | |
Channel 1,2 gain register | |
const int | MSK_GAIN1 = 0x0F |
1st channel gain selection mask | |
const int | MSK_GAIN2 = 0xF0 |
2nd channel gain selection mask | |
const int | SHL_GAIN1 = 0 |
1st channel gain shift | |
const int | SHL_GAIN2 = 4 |
2nd channel gain shift | |
Channel 3,4 gain register | |
const int | MSK_GAIN3 = 0x03 |
3rd channel gain selection mask | |
const int | MSK_GAIN4 = 0x0C |
4th channel gain selection mask | |
const int | SHL_GAIN3 = 0 |
3rd channel gain shift | |
const int | SHL_GAIN4 = 2 |
4th channel gain shift | |
Channel 1,2 filter registers | |
const int | MSK_LPF12 = 0x0F |
1st, 2nd channel low pass filter selection mask | |
const int | SHL_LPF12 = 0 |
1st, 2nd channel low pass filter shift | |
Multiplexer register | |
const int | MSK_CHN1 = 0x07 |
1st channel selection mask | |
const int | MSK_CHN2 = 0x38 |
2nd channel selection mask | |
const int | MSK_CHNSEQ = 0x40 |
channel sequence selection mask | |
const int | MSK_CLKSEQ = 0x80 |
clock sequence selection mask | |
const int | SHL_CHN1 = 0 |
1st channel shift | |
const int | SHL_CHN2 = 3 |
2nd channel shift | |
Gain & filter tables | |
const RegInfo | GainInfoTable [] |
gain masks and shifts for channel 1..4. | |
const int | gain12Table [] |
valid gains for channel 1 & 2. | |
const int | gain34Table [] |
valid gains for channel 3 & 4. | |
const Freq | freq12Table [] |
valid low pass frequencies for channel 1 & 2. |
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Initial value: { 1e6, 100e3, 10e3, 1e3, 0.1e3, } |
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Initial value: { 10, 20, 40, 80, 100, 200, 400, 800, 1000, 2000, 4000, 8000, 10000, 20000, 40000, 80000, } |
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Initial value: { 1, 10, 100, 1000, } |
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Initial value: |